1. Field of Art
This invention relates to forming a substrate structure with deposition material filling one or more recesses on a substrate.
2. Description of Related Art
Many semiconductor devices include transistors, wirings, insulators and other components formed on a substrate. Conventionally, transistors are insulated from each other using technique such as LOCOS (local oxidation of silicon) or SEPDX (selective poly oxidation). To accommodate semiconductor devices with smaller components for higher level of integration, a technique called STI (Shallow Trench Isolation) was developed. The STI forms trenches around the periphery of a transistor and then fills the trenches with silicon oxide (SiO2). In order to fill the trenches with SiO2, techniques such as atmospheric pressure chemical vapor deposition (APCVD), high density plasma (HDP) oxide deposition, and sub-atmospheric chemical vapor deposition (SACVD) are be used. These conventional techniques, however, are not suitable to fill the trenches in cases where 45 nm or smaller design rules apply, or an aspect ratio of 5:1 or larger applies.
FIG. 1A is a schematic diagram illustrating a substrate 1 with a recess 2 filled using a conventional technique. In FIG. 1A, the recess 2 may be filled with O3-TEOS oxide 3 by SACVD using tetraethyl orthosilicate (TEOS) as a source precursor and using ozone as a reaction precursor. However, the recess 2 may not be filled completely, if the width (or pitch) of the recess 2 is small or the aspect ratio is high. Consequently, voids 4 are formed in the recess, which reduces the reliability of the semiconductor device.
FIG. 1B is a schematic diagram illustrating the substrate 1 with the recess 2 using a conventional technique. FIG. 1B illustrates the recess 2 on the substrate 1 filled using an HDP apparatus implementing chemical vapor deposition (CVD) while controlling the bias of the substrate to etch the substrate. The conventional technique of FIG. 1B reduces overhang of the oxide 5 deposited at the edge of the recess 2 by resputtering. However, the HDP oxide 5 accumulates at the bottom of the recess 2. Hence, this convention technique may cause damage to the substrate 1 by bias or plasma. Further, if the aspect ratio of the recess 2 is high, then the recess 2 may be filled partially, resulting in uneven coating of the substrate 1.